[INRAD] IF circuitry design

Zoli Pitman HA1AG ha1ag at yahoo.com
Sat Feb 11 05:02:05 CST 2006


Dear all,

During contests I heavily use the 2nd VFO of my MP and I
was always unhappy with its performance in crowded band
conditions especially on 80/40m SSB.

I started to look for options to improve selectivity and
big signal handling of this second RX. I summerized and
illustrated my ideas on my webpage at www.hg6n.hu/ha1ag
under FT1000MP sub-vfo options. However when analyzing
Yaesu's implementation of 455 kHz IF filtering I've got a
few questions I can't answer. I would be very happy if
someone could answer them or give a hint about where to
look further.

The 455 kHz IF filter blocks are placed between two
transformers and the actual one is selected by diodes.
There are auxuliary components added for impedance matching
and diode biasing. The T-circuit of resistors is placed
_behind_ the IF filter. I think it is crucial to provide
constant resistive load to the mixer. Thus I should expect
them to go in front of the filter, shouldn't I?  Is there
any reason of it being there?

I still have to measure the S-parameters of the filters but
I expect them to have a low reflection coeffiecent off the
nominal frequency. It would also imply to put the
attenuation between the mixer and the filter.

Is there any literature where I can read about designing IF
stages?

Any comments would be gratefully appreciated,

zoli ha1ag

www.hg6n.hu/ha1ag

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